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#define | INTR_WAIT_FLAGS *(__irq_flags) |
| | BIOS register used by swiIntrWait() and swiWaitForVBlank().
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#define | INTR_WAIT_FLAGSAUX *(__irq_flagsaux) |
| | BIOS register used by swiIntrWaitAUX() in the ARM7 in DSi mode.
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#define | INTRWAIT_CLEAR_FLAGS 1 |
| | Wait for a new interrupt to happen. For swiIntrWait() and swiIntrWaitAUX()
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#define | INTRWAIT_KEEP_FLAGS 0 |
| | Return if the interrupt has happened. For swiIntrWait() and swiIntrWaitAUX()
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#define | IRQ_AES BIT(12) |
| | AES interrupt mask (DSi ARM7)
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#define | IRQ_ALL (~0) |
| | Mask for all interrupts.
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#define | IRQ_CAMERA BIT(25) |
| | Camera interrupt mask (DSi ARM9)
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#define | IRQ_CARD BIT(19) |
| | interrupt mask DS Card Slot
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#define | IRQ_CARD_LINE BIT(20) |
| | interrupt mask
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#define | IRQ_CART BIT(13) |
| | GBA cartridge interrupt mask.
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| #define | IRQ_DMA(n) (1 << ((n) + 8)) |
| | Returns the interrupt mask for a given DMA channel.
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#define | IRQ_DMA0 BIT(8) |
| | DMA 0 interrupt mask.
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#define | IRQ_DMA1 BIT(9) |
| | DMA 1 interrupt mask.
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#define | IRQ_DMA2 BIT(10) |
| | DMA 2 interrupt mask.
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#define | IRQ_DMA3 BIT(11) |
| | DMA 3 interrupt mask.
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#define | IRQ_DSP BIT(24) |
| | DSP interrupt mask (DSi ARM9)
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#define | IRQ_FIFO_EMPTY IRQ_SEND_FIFO |
| | Deprecated name.
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#define | IRQ_FIFO_NOT_EMPTY IRQ_RECV_FIFO |
| | Deprecated name.
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#define | IRQ_GEOMETRY_FIFO BIT(21) |
| | Geometry FIFO interrupt mask (ARM9)
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#define | IRQ_HANDLER *(__irq_vector) |
| | BIOS register that contains the address of the global interrupt handler.
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#define | IRQ_HBLANK BIT(1) |
| | Horizontal blank interrupt mask.
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#define | IRQ_HEADPHONE BIT(5) |
| | Headphone interrupt mask (DSi ARM7)
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#define | IRQ_I2C BIT(6) |
| | I2C interrupt mask (DSi ARM7)
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#define | IRQ_IPC_SYNC BIT(16) |
| | IPC sync interrupt mask.
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#define | IRQ_KEYS BIT(12) |
| | Keypad interrupt mask.
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#define | IRQ_LID BIT(22) |
| | Hinge open interrupt mask.
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#define | IRQ_MICEXT BIT(14) |
| | microphone interrupt mask (DSi ARM7)
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| #define | IRQ_NDMA(n) (1 << ((n) + 28)) |
| | Returns the interrupt mask for a given NDMA channel (DSi only).
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#define | IRQ_NDMA0 BIT(28) |
| | NDMA 0 interrupt mask (DSi)
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#define | IRQ_NDMA1 BIT(29) |
| | NDMA 1 interrupt mask (DSi)
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#define | IRQ_NDMA2 BIT(30) |
| | NDMA 2 interrupt mask (DSi)
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#define | IRQ_NDMA3 BIT(31) |
| | NDMA 3 interrupt mask (DSi)
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#define | IRQ_NETWORK IRQ_RTC |
| | Deprecated name.
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#define | IRQ_RECV_FIFO BIT(18) |
| | Receive FIFO not empty interrupt mask.
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#define | IRQ_RTC BIT(7) |
| | Serial/RTC interrupt mask (ARM7)
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#define | IRQ_SD_DATA BIT(9) |
| | SD/MMC data interrupt mask (DSi ARM7)
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#define | IRQ_SDIO BIT(10) |
| | SDIO controller interrupt mask (DSi ARM7)
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#define | IRQ_SDIO_DATA BIT(11) |
| | SDIO data interrupt mask (DSi ARM7)
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#define | IRQ_SDMMC BIT(8) |
| | SD/MMC controller interrupt mask (DSi ARM7)
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#define | IRQ_SEND_FIFO BIT(17) |
| | Send FIFO empty interrupt mask.
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#define | IRQ_SPI BIT(23) |
| | SPI interrupt mask.
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| #define | IRQ_TIMER(n) (1 << ((n) + 3)) |
| | Returns the interrupt mask for a given timer.
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#define | IRQ_TIMER0 BIT(3) |
| | Timer 0 interrupt mask.
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#define | IRQ_TIMER1 BIT(4) |
| | Timer 1 interrupt mask.
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#define | IRQ_TIMER2 BIT(5) |
| | Timer 2 interrupt mask.
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#define | IRQ_TIMER3 BIT(6) |
| | Timer 3 interrupt mask.
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#define | IRQ_VBLANK BIT(0) |
| | Vertical blank interrupt mask.
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#define | IRQ_VCOUNT BIT(2) |
| | Vcount match interrupt mask.
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#define | IRQ_WIFI BIT(24) |
| | WIFI interrupt mask (ARM7)
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#define | MAX_INTERRUPTS 32 |
| | Maximum number of interrupts.
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#define | MAX_INTERRUPTS_AUX 15 |
| | Maximum number of ARM7 interrupts in DSi mode (REG_AUXIE and REG_AUXIF).
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| #define | REG_AUXIE (*(vuint32 *)0x04000218) |
| | Auxiliary Interrupt Enable register.
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| #define | REG_AUXIF (*(vuint32 *)0x0400021C) |
| | Auxiliary Interrupt Flag register.
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| #define | REG_IE (*(vuint32 *)0x04000210) |
| | Interrupt Enable register.
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| #define | REG_IF (*(vuint32 *)0x04000214) |
| | Interrupt Flag register.
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| #define | REG_IME (*(vuint32 *)0x04000208) |
| | Interrupt Master Enable Register.
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| static int | enterCriticalSection (void) |
| | Disable interrupts by setting IME to 0.
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| void | irqClear (u32 irq) |
| | Remove the handler associated with the interrupt mask IRQ.
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| void | irqClearAUX (u32 irq) |
| | Remove the handler associated with the AUX interrupt mask IRQ.
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| void | irqDisable (u32 irq) |
| | Prevent the given interrupt from occuring.
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| void | irqDisableAUX (u32 irq) |
| | Prevent the given AUX interrupt from occuring.
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| void | irqEnable (u32 irq) |
| | Allow the given interrupt to occur.
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| void | irqEnableAUX (u32 irq) |
| | Allow the given AUX interrupt to occur.
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| void | irqInit (void) |
| | Initialise the libnds interrupt system.
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| void | irqInitHandler (VoidFn handler) |
| | Install a user interrupt dispatcher.
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| void | irqSet (u32 irq, VoidFn handler) |
| | Add a handler for the given interrupt mask.
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| void | irqSetAUX (u32 irq, VoidFn handler) |
| | Add a handler for the given AUX interrupt mask.
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| static void | leaveCriticalSection (int oldIME) |
| | Leaves a critical section by restoring IME to its previous value.
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| VoidFn | setPowerButtonCB (VoidFn CB) |
| | Set callback for DSi Powerbutton press.
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| void | swiIntrWait (u32 clearOldFlags, uint32_t flags) |
| | Wait for interrupt(s) to occur.
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| void | swiIntrWaitAUX (u32 clearOldFlags, uint32_t flags, uint32_t aux_flags) |
| | Wait for interrupt(s) to occur. DSi ARM7 only.
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| void | swiWaitForVBlank (void) |
| | Waits for a vertical blank interrupt.
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